1. Field of the Invention
The present invention relates to a decision feedback equalizer and particularly to a method for generating a Toeplitz matrix in a decision feedback equalizer to reduce inter-chip interference (ICI) and inter-symbol interference (ISI).
2. Description of the Related Art
Wireless communication channels often suffer from severe inter-chip interference (ICI), inter-symbol interference (ISI), and multi-path fading effect. Channel equalization is essential to combat channel distortion caused by the above, so that symbols can be correctly determined at the receiving end. Channel equalization can be performed either on a chip basis or on a sample basis. In chip based equalization, the equalizer coefficients are updated on every received chip. Decision feedback equalizer (DFE) using the least mean-squared (LMS) algorithm is a well-known equalization technique for magnetic storage and digital communication. The basic block diagram of traditional DFE is depicted in FIG. 1, where DFE is composed of two main finite impulse response (FIR) filters, the feedforward filter (FFF) 102 and the feedback filter (FBF) 104. The outputs from both filters are added and fed into a slicer 106. The signal output from the slicer 106 is the final equalized data. The basic function of FFF 102 and FBF 104 is to cancel the pre-cursor and post-cursor inter-chip interference (ICI) respectively, while the WUC 108 and WUD 110 in the figure stand for the weight-update blocks for the FFF 102 and the FBF 104.
DFE in the chip-base helps alleviate ICI. ISI, however, cannot be completely cancelled with this type of DFE. Thus, a DFE that reduces ISI and ICI simultaneously is desirable.